In many applications, power amplifier design requires high linearity and high efficiency. Generally, linear amplifiers can eliminate most distortion, but have a problem in that efficiency thereof is poor. In this case, when a high-efficiency power amplifier is used, a sufficient RF signal can be provided, even with low DC power, but many harmonic components and a distortion phenomenon may occur in output signals at any time, thereby deteriorating the performance of output RF signals.
As well known in the art, the efficiency of a power amplifier is connected with the output power of the amplifier itself, and high efficiency always is shown at high output power. When a power amplifier is applied to a base station, the power amplifier operates at a few dB back-off from the peak power point in order to satisfy a strict linearity condition, which acts as a main cause of deteriorating the efficiency of the power amplifier. Especially, such a deterioration phenomenon becomes more serious when a signal having a high peak-to-average ratio (PAR), such as in the (W)CDMA or Wibro, is input. In order to relieve such a deterioration phenomenon, various Doherty amplifiers, including a variety of amplifiers, may be employed to implement signals which are efficient and have low distortion over a wide range of signal power.
FIG. 1 is a view illustrating a convention single-ended amplifier, which is often used for configuration of a Doherty amplifier. The single-ended amplifier includes an input matching network for transforming a terminal impedance into an optimum input impedance for a transistor, the transistor for amplifying an input RF signal, a λ/4 line directly-connected to a drain (or collector) of the transistor so that DC voltage can be supplied to the transistor, and an output matching network for transforming a terminal impedance into an optimum output impedance for the transistor.
FIG. 2 is a view illustrating the configuration of a conventional Doherty amplifier which uses two identical cells, the illustration of which is given in FIG. 1, as a carrier amplifier and a peaking amplifier, respectively. An input RF signal is divided into two equal signals, which are introduced to the carrier amplifier and the peaking amplifier, respectively. At rear ends of output fundamental matching networks of the carrier amplifier and peaking amplifier, output offset lines are added, respectively, to transform a small signal output impedance into a very high value. In addition, in order to accurately perform a load impedance modulation, another λ/4 line is added at a rear end of the output offset line for the carrier amplifier. Thereafter, a carrier and the output of the peaking amplifier are combined with each other through a still another λ/4 line. In order to more efficiently combine the output power, an input offset line for according the output current phase of the carrier amplifier to the output current phase of the peaking amplifier is added.
While the carrier amplifier operates over all power ranges, the peaking amplifier starts to operate at a 6 dB back-off point of a peak power point. In order to satisfy such a condition, the gate bias level of the peaking amplifier is set to be a value less than that of the carrier amplifier. Accordingly, it is possible to improve the general efficiency of the system, without exerting a large influence on the linearity of the amplifier system.